1. Field of the Invention
The present invention relates to a circuit device and a method for manufacturing the circuit device, and more particularly to a thin-type circuit device and a method of manufacturing the thin-type circuit device without the need of providing a support substrate.
2. Description of the Related Art
Conventionally, it has been demanded that a circuit device which is set in an electronic apparatus is reduced in size, thickness and weight, because the circuit device is used for a portable telephone, a portable computer and so on.
For example, a semiconductor device as a circuit device is typically a package type semiconductor device which is conventionally sealed by normal transfer molding. This semiconductor device 1 is mounted on a printed circuit board PS as shown in FIG. 24.
This package type semiconductor device 1 has a semiconductor chip 2 covered with a resin layer 3, with a lead terminal 4 for external connection derived from the side of this resin layer 3.
However, this package type semiconductor device 1 had the lead terminal 4 out of the resin layer 3, and was too large in total size to meet smaller, thinner and lighter requirements.
Therefore, various companies have competed to develop a wide variety of structures which are reduced in size, thickness and weight. Recently, a wafer scale CSP which is as large as a chip size, called a CSP (Chip Size Package), or a CSP which is slightly larger than the chip size, has been developed.
FIG. 25 shows a CSP 6 which adopts a glass epoxy substrate 5 as a support substrate and which is slightly larger than a chip size. Herein, a transistor chip T is mounted on the glass epoxy substrate 5.
On the surface of this glass epoxy substrate 5, a first electrode 7, a second electrode 8 and a die pad 9 are formed, and on the back face, a first back electrode 10 and a second back electrode 11 are formed. Via a through hole TH, the first electrode 7 and the first back electrode 10, as well as the second electrode 8 and the second back electrode 11, are electrically connected. On the die pad 9, the bare transistor chip T is fixed. An emitter electrode of transistor and the first electrode 7 are connected via a bonding wire 12, and a base electrode of transistor and the second electrode 8 are connected via the bonding wire 12. Further, a resin layer 13 is provided on the glass epoxy substrate 5 to cover the transistor chip T.
The CSP 6 adopts the glass epoxy substrate 5, which has the merits of a simpler structure extending from the chip T to the back electrodes 10, 11 for external connection, and a less expensive cost of manufacture, than the wafer scale CSP.
The CSP 6 is mounted on the printed circuit board PS, as shown in FIG. 24. The printed circuit board PS is provided with the electrodes and wires making up an electric circuit, and has the CSP 6, the package type semiconductor device 1, a chip resistor CR and a chip capacitor CC fixed for the electrical connection.
A circuit on this printed circuit board is packaged in various sets.
Referring to FIGS. 26 and 27, a method for manufacturing this CSP will be described below. In FIG. 27, reference is made to a flow diagram entitled as a Glass epoxy/flexible substrate, listed in the middle.
Firstly, the glass epoxy substrate 5 is prepared as a base material (support substrate). On both sides of the glass epoxy substrate 5, the Cu foils 20, 21 are applied via an insulating adhesive (see FIG. 26A).
Subsequently, the Cu foils 20, 21 corresponding to the first electrode 7, the second electrode 8, the die pad 9, the first back electrode 10 and the second back electrode 11 are coated with an etching resist 22 and patterned. Note that the patterning may be made separately on the front face and the back face (see FIG. 26B).
Then, using a drill or a laser, a bore for the through hole TH is opened in the glass epoxy substrate. This bore is plated to form the through hole TH. Via this through hole TH, the electrical connection between the first electrode 7 and the first back electrode 10 and between the second electrode 8 and the second back electrode 10 is made (see FIG. 26C).
Further, though being not shown in the figure, the first electrode 7 and the second electrode 8 which become the bonding posts are subjected to Ni plating or Au plating, and the die pad 9 which becomes a die bonding post is subjected to Au plating to effect die bonding of the transistor chip T.
Lastly, the emitter electrode of the transistor chip T and the first electrode 7, and the base electrode of the transistor chip T and the second electrode 8 are connected via the bonding wire 12, and covered with the resin layer 13 (see FIG. 26D).
As required, individual electrical elements are formed by dicing. In FIG. 26, only one transistor chip T is provided on the glass epoxy substrate 5, but in practice, a matrix of transistor chips T are provided. Accordingly, a dicing apparatus separates them into individual elements.
In accordance with the above manufacturing method, a CSP type electrical element using the support substrate 5 can be completed. This manufacturing method is also effected with the use of a flexible sheet as the support substrate.
On the other hand, a manufacturing method adopting a ceramic substrate is shown in a flow diagram to the left in FIG. 27. After the ceramic substrate which is the support substrate is prepared, the through holes are formed. Then using a conductive paste, the electrodes are printed and sintered on the front face and the back face. Thereafter, the same manufacturing method of FIG. 26, up to coating the resin layer is followed, but since the ceramic substrate is very fragile, and is likely to break off, unlike a flexible sheet or the glass epoxy substrate, there is a problem with the difficulty of molding using die. Therefore, a sealing resin is potted and cured, then polished for the uniform treatment of the face of the sealing resin. Lastly, using the dicing apparatus, individual devices are made.
In FIG. 25, the transistor chip T, connecting means 7 to 12, and the resin layer 13 are requisite components for the electrical connection with the outside, and the protection of transistor. However, only these components were difficult to provide an electrical circuit device reduced in size, thickness and weight.
Essentially, there is no need of having the glass epoxy substrate 5 which becomes the support substrate, as described before. However, since the manufacturing method involves pasting the electrode on the substrate, the support substrate is required, and this glass epoxy substrate 5 could not be dispensed with.
Accordingly, the use of this glass epoxy substrate 5 raised the cost. Further, since the glass epoxy substrate 5 was thick, the circuit device was thick, limiting the possibility to reduce the size, thickness and weight of the device.
Further, the glass epoxy substrate or the ceramic substrate necessarily requires a through hole forming process for connecting the electrodes on both sides. Hence, there was a problem with the long manufacturing process.
FIG. 28 shows a pattern diagram on the glass epoxy substrate, the ceramic substrate or a metal substrate. On this pattern, an IC circuit is typically made, with a transistor chip 21, an IC chip 22, a chip capacitor 23 and/or a chip resistor 24 mounted. Around this transistor chip 21 or the IC chip 22, a bonding pad 26 integral with a wire 25 is formed to electrically connect the chips 21, 22 via a bonding wire 28. A wire 29 is made integrally with an external lead pad 30. These wires 25, 29 are bent through the substrate, and made slender in the IC circuit, as necessary. Accordingly, this slender wire has smaller contact area with the substrate, leading to exfoliation or curvature of the wire. The bonding pad 26 is classified into a bonding pad for power and a bonding pad for small signal. Particularly, the bonding pad for small signal has a small bonding area, which caused a film exfoliation.
Further, an external lead is fixed to an external lead pad 30. There was a problem that the external lead pad 30 might be exfoliated due to an external force applied to the external lead.
The present invention intends to obtain a semiconductor device which is easy to be manufactured, and has a high accuracy and reliability.
The present invention has been achieved in the light of the above-mentioned problems, and its object is to provide a circuit device, comprising:
a plurality of conductive paths;
a circuit element mounted on said desired conductive paths; and
a package of an insulating resin for coating said circuit element and supporting integrally said conductive paths;
a plurality of lead terminals for connecting with outer circuit, the lead terminals being exposed from one surface of the package
Preferably, the conductive paths are made of pressed metal.
In the present invention, since a plate like body is used as a conductive plate for forming conductive path pattern and an isolation trench is formed by half punching or half etching to form conductive paths, conductive paths whose sheet resistance is very low, whose pattern is fine and whose surface is very flat, can be obtained.
Therefore, bonding reliability is very high and in the case of mounting a high-integrated semiconductor circuit, high accuracy and reliability in the high-integrated semiconductor circuit device can be realized.
According to using a pressed metal as a conductive plate, boundaries are positioned at random, thereby sheet resistance is low and fine and very flat conductive paths in microscopic views can be obtained.
In the case that plating film whose thickness is formed so thick as to be able to use as conductive paths, film thickness is deviated and a sufficient flatness cannot be obtained. For example, when a plating film whose thickness is 20-100 xcexcm is formed, it is difficult to have an uniform thickness of the plating film. Therefore bonding strength is lowered.
Contrary that, in the case if conductive paths formed by half etching a pressed metal such as copper foil, the surface of the conductive paths is very flat and bonding accuracy and bonding reliability are very high.
In the plating film, according to using a mirror polished surface of a substrate as a growth starting face of plating, then removing the substrate and using the growth starting face as a bonding face, flatness of the bonding surface is slightly improved. However accuracy in the case is inferior to use the pressed metal such as cooper.
Further according to the above structure, the present invention has following advantages. The semiconductor device of the present invention can be enduring a stress caused by a warp of a thin type package. Further an electrical connecting portion can be prevented from being polluted. Since rigidity is improved, operation efficiency can be improved.
For example, by using a pressed metal including a Fexe2x80x94Ni alloy as a main component, as the conductive path, thermal expansion coefficient can be prevented from mis-matching, since thermal expansion coefficient of the silicon chip is near to that of the Fexe2x80x94Ni alloy.
Further, by using a pressed metal including Al as a main component, the device becomes lighter than that using a pressed metal including Cu or Fexe2x80x94Ni as a main component. In this case, without forming a plating film, direct bonding can be conducted with using an Al wiring or Au wiring.
Since the conductive path is made of a material whose crystal boundary is disposed at random so that a surface of the conductive path is flat, endurance against bending or rigidity can be improved and a deterioration of the conductive path.
Further a surface on which circuit element is to be formed is covered with a conductive film made of metal material different from a material of the conductive path. Therefore warp or wire breaks of the conductive path caused by a stress, and reliability of connecting portion between a die-bonding portion and an element. Further according to using the conductive film made of Ni plating film, wire bonding using Al wire can be conducted and formation of a visor (projected portion) can be formed.
Further, for example, the present invention has been achieved in the light of the above-mentioned problems, and its object is to provide a circuit device, comprising:
a plurality of conductive paths which are electrically isolated;
a plurality of circuit elements fixed on said desired conductive paths; and
an insulating resin for coating said circuit elements and supporting integrally said conductive paths;
wherein at least one of the plurality of said conductive paths is used for an interconnect to electrically connect the plurality of said circuit elements, and has a curved lateral face(side surface) to be fitted with said insulating resin. The present invention can resolve the above conventional problems with the minimum number of components, the conductive path being prevented from slipping off the insulating resin.
According to a second aspect of the invention, there is provided a circuit device, comprising:
a plurality of conductive paths which are electrically isolated by a trench;
a plurality of circuit elements fixed on said desired conductive paths; and
an insulating resin for coating said circuit elements and supporting integrally said conductive paths by being filled into said trench between said conductive paths;
wherein at least one of the plurality of said conductive paths is used for an interconnect to electrically connect the plurality of said circuit elements, and has a curved lateral face to be fitted with said insulating resin. The present invention can resolve the above conventional problems in such a way that the insulating resin filled into the trench supports the conductive path integrally to prevent slippage of the conductive path.
According to a third aspect of the invention, there is provided a circuit device, comprising:
a plurality of conductive paths which are electrically isolated by a trench;
a plurality of circuit elements fixed on said desired conductive paths; and
an insulating resin for coating said circuit elements and supporting integrally said conductive paths by being filled into said trench between said conductive paths, with the back face of said conductive paths exposed;
wherein at least one of the plurality of said conductive paths is used for an interconnect to electrically connect the plurality of said circuit elements, and has a curved lateral face to be fitted with said insulating resin. The present invention can resolve the above conventional problems in such a way that the back face of conductive path is utilized as an electrode for external connection, to prevent slippage of the conductive path, while the through hole can be also dispensed with.
According to a fourth aspect of the invention, there is provided a manufacturing method for a circuit device comprising the steps of:
forming the conductive paths having a curved lateral face by preparing a conductive foil, and forming a trench having a smaller depth than the thickness of said conductive foil on said conductive foil excluding at least a region which becomes a conductive path;
fixing a plurality of circuit elements on said desired conductive paths;
coating and molding said circuit elements with an insulating resin to be filled into said trench for fitting said conductive paths with said insulating resin; and
forming a circuit by removing said conductive foil at a portion of thickness where said trench is not provided, to enable an interconnect formed of a part of said conductive path to be electrically connected with said plurality of circuit elements. The present invention can resolve the above conventional problems in such a way that the conductive foil for forming the conductive paths is a starting material, and the conductive foil has a supporting function till the insulating resin is molded, and the insulating resin has the supporting function after molding. There is no need of providing the support substrate.
According to a fifth aspect of the invention, there is provided a manufacturing method for a circuit device comprising the steps of:
forming the conductive paths having a curved lateral face by preparing a conductive foil, and forming a trench having a smaller depth than the thickness of said conductive foil on said conductive foil excluding at least a region which becomes a conductive path;
fixing a plurality of circuit elements on said desired conductive paths;
providing connecting means for electrically connecting an electrode of said circuit element with desired one of said conductive paths;
coating and molding said circuit elements with an insulating resin to be filled into said trench for fitting said conductive paths with said insulating resin;
forming a circuit by removing uniformly said conductive foil at a portion of thickness where said trench is not provided from the back side and making the back face of said conductive paths and said insulating resin across said trench a substantially flat surface, to enable an interconnect formed of a part of said conductive path to be electrically connected with said plurality of circuit elements. The present invention can resolve the above conventional problems in such a way as to have bonding which is prevented from slipping and form a flat circuit device.